Fault insertion is the means by which logic faults are introduced into an electronic digital circuit. Logic faults are operator induced logic signals such as a logic "high" or logic "low" that are deliberately injected into a digital electronic circuit. The circuit is then monitored to ascertain if it responded correctly to the fault. For example, in a digital circuit having the capability to sense such failures and to send messages to a controller, an inserted fault should solicit a trouble message to the controller from the circuit. A failure to send a trouble message would indicate a problem with the maintenance functions of the circuit under test. Additionally, faults may be inserted into a circuit under test to ascertain how the circuit operates under the faulted conditions.
Presently, fault insertion is a tedious manual process carried out by a craftsperson or technician. The technician using jumper wire, or a similar tool, attaches one end of the jumper to a connector pin of the device under test and grounds the other end. In a digital logic system this would simulate a logic "Low" or "0" state. The technician would then monitor and interpret the operating conditions of the circuit under test using either a test terminal and monitor, an oscilloscope or any other means commonly known for testing the performance of digital circuits. The process is then repeated for each fault inserted into the circuit under test.
Manual fault insertion has disadvantages in that it is extremely time consuming, and it is prone to human error. Additionally, without special equipment only logic "0" faults could be inserted into the circuit under test. The logic "0" only fault insertion, tends to be incomplete and therefore inefficient for the proper testing of digital circuits.
Accordingly, it is an object of the present invention to provide a fault insertion circuit which can be programmed by an operator to automatically apply fault signals to a digital circuit under test.